Electrical depth profile of p-type GaAs/Ga(As, N)/GaAs heterostructures determined by capacitance-voltage measurements

Citation
P. Krispin et al., Electrical depth profile of p-type GaAs/Ga(As, N)/GaAs heterostructures determined by capacitance-voltage measurements, J APPL PHYS, 88(7), 2000, pp. 4153-4158
Citations number
32
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
JOURNAL OF APPLIED PHYSICS
ISSN journal
00218979 → ACNP
Volume
88
Issue
7
Year of publication
2000
Pages
4153 - 4158
Database
ISI
SICI code
0021-8979(20001001)88:7<4153:EDPOPG>2.0.ZU;2-3
Abstract
Capacitance-voltage measurements on metal-semiconductor contacts are used t o examine depth-resolved electrical characteristics of GaAs/Ga(As, N)/GaAs heterostructures. The experimental depth profiles of the carrier concentrat ion are compared with calculations based on self-consistent solutions of th e Poisson equation. As-grown Ga(As, N) layers are p type, and hole concentr ations of about 3 x 10(16) cm(-3) are observed for undoped Ga(As, N) layers with a GaN mole fraction of 3% and thicknesses below 80 nm. This hole conc entration is stable during rapid thermal annealing. For a GaN mole fraction of about 3%, the valence band offset between GaAs and Ga(As, N) is found t o be + (11 +/- 2) meV. The heterointerfaces are of type I. The dominant car rier depletion in as-grown heterostructures is due to donor-like defect lev els, which are accumulated at the GaAs-on-Ga(As, N) interface. The amount o f these interfacial defects rises remarkably in thicker Ga(As, N) layers, b ut can be completely removed by rapid thermal annealing after growth. By re lease spectroscopy, further hole traps with definite level energies are dis tinguished at the Ga(As, N)-on-GaAs interface, which are probably due to th e specific GaAs growth conditions. (C) 2000 American Institute of Physics. [S0021-8979(00)00220-6].