An ultra-thin midgap gate FDSOI MOSFET

This work describes an ultra-thin fully depleted silicon-on-insulator (FDSO I) MOS transistor design, which uses a midgap workfunction metal gate and l ightly doped channel to set the threshold voltages (V-th) Of both nMOSFETs and pMOSFETs symmetrically at 0.3 V for ultra-low voltage applications. In contrast to conventional FDSOI devices, the threshold voltage sensitivity f or this FDSOI device displays excellent immunity to variations in SOI film thickness and channel doping density. We find a 1% variation for a 25% vari ation in SOI film thickness centered at 10 nm or a 50% channel doping varia tion centered at 1 x 10(15) cm(-3). Such a device is very suitable for ultr a-low voltage applications. (C) 2000 Elsevier Science Ltd. All rights reser ved.