A single-chip CMOS transceiver front-end for DCS-1800 wireless communications

This work describes the design and realization of a low voltage single-chip wireless transceiver front-end in a standard 0.25 mu m CMOS technology. Th e presented prototype integrates the LNA, down-converters, VCO, quadrature generator, up-converter and pre-amplifier on a single die. A high level of integration is achieved by using a low-IF topology for reception, a direct quadrature up-conversion topology for transmission and an oscillator with o n-chip integrated inductor. The final objective of this design is to develo p a complete transceiver system for wireless communications at 1.8 GHz that can be built with a minimum of surrounding components: only an antenna, a duplexer, a power amplifier and a baseband signal processing chip. The pres ented circuit consumes 240 mW from a 2.5 V supply and occupies a die area o f 8.6 mm(2).