Design theory and performance of 1-GHz CMOS downconversion and upconversion mixers

Citation
Kk. Kan et al., Design theory and performance of 1-GHz CMOS downconversion and upconversion mixers, ANALOG IN C, 24(2), 2000, pp. 101-111
Citations number
10
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
ISSN journal
09251030 → ACNP
Volume
24
Issue
2
Year of publication
2000
Pages
101 - 111
Database
ISI
SICI code
0925-1030(200008)24:2<101:DTAPO1>2.0.ZU;2-G
Abstract
A CMOS mixer topology capable of both downconversion and upconversion mixin g for use in integrated wireless transceivers is presented. The mixing is b ased on two cross-coupled differential pairs as commutators with two source -followers as current modulators. Independence of the input and output band widths allows this topology to be optimized separately for either downconve rsion or upconversion mixer. The prototypes of both upconversion and downco nversion mixers, optimized for linearity and realized in 0.8 mu m CMOS tech nology, have been demonstrated to fully operate at 1 GHz with good linearit y and low power consumption. In addition, another mixer, optimized for nois e figure and realized in 0.5 mu m CMOS technology, has been designed to ach ieve a NF of around 12 dB.