DESIGN AND ANALYSIS OF CURRENT-MODE CMOS ANALOG DEFUZZIFICATION CIRCUIT FOR FUZZY CONTROLLERS

Current-mode CMOS analog defuzzification circuits previously proposed are insensitive to absolute variation of the fabrication process and a n easy to expand into a multiple-input circuit. However, they have two disadvantages. One is that they need two input currents which are equ al in magnitude and opposite in direction (sign). A current steering c ircuit which consists of current mirrors is used for changing the dire ction of the input current signals. However, because current mirrors a re strongly influenced by channel length modulation effect, it is very difficult to generate the desired current signal. The other disadvant age is that they need input bias currents for all input signals, which causes high power consumption. In this paper, a current-mode CMOS ana log four-quadrant multiplier for defuzzification circuits is proposed. The proposed multiplier is insensitive to absolute variation of the f abrication process. Furthermore, it. removes the above disadvantages. A defuzzification circuit using the proposed multiplier is designed. T he proposed defuzzification circuit is improved to reduce power dissip ation by using a common bias block circuit. These circuits are analyze d in derail by the PSPICE System. The proposed defuzzification circuit is evaluated and its validity is discussed. (C) 1997 Scripta Technica , Inc.