Monte Carlo simulation of the CHISEL flash memory cell

Citation
Jd. Bude et al., Monte Carlo simulation of the CHISEL flash memory cell, IEEE DEVICE, 47(10), 2000, pp. 1873-1881
Citations number
40
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON ELECTRON DEVICES
ISSN journal
00189383 → ACNP
Volume
47
Issue
10
Year of publication
2000
Pages
1873 - 1881
Database
ISI
SICI code
0018-9383(200010)47:10<1873:MCSOTC>2.0.ZU;2-X
Abstract
This work shows how physically-based hot carrier simulation was used to und erstand the importance of CHannel Initiated Secondary ELectron (CHISEL) inj ection in scaled MOSFETs, and how it was used to develop a powerful CHISEL- based technique for low voltage flash programming. Furthermore, it is shown how CHISEL flash addresses many of the disadvantages of CHE programming te chniques, making it an ideal candidate for low-voltage, low-power Gigabit f lash memories.