Dimensional effects on the reliability of polycrystalline silicon thin-film transistors

Citation
Hw. Zan et al., Dimensional effects on the reliability of polycrystalline silicon thin-film transistors, MICROEL REL, 40(8-10), 2000, pp. 1479-1483
Citations number
8
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONICS RELIABILITY
ISSN journal
00262714 → ACNP
Volume
40
Issue
8-10
Year of publication
2000
Pages
1479 - 1483
Database
ISI
SICI code
0026-2714(200008/10)40:8-10<1479:DEOTRO>2.0.ZU;2-G
Abstract
We found that for unpassivated short-channel TFTs, hot carrier stress-induc ed degradation phenomena are different with various channel geometries. For device with a wide channel width, the threshold voltage is increased while the subthreshold swing is almost unchanged. The stress-induced oxide-trapp ed charges are responsible for the degradation. For others with narrow chan nel widths after stress, on the contrary, the subthreshold swing and I-min are increased, the trap density is greatly increased and the trap-enhanced kink effect is also observed. This is due to the generation of stress-induc ed grain boundary traps near the drain side. Additionally, the stress-induc ed degradations of passivated TFTs with various geometries are identical. T he increased defect density dominates the mechanism since the hot-carrier s tress tends to break the passivated SI-H bonds. (C) 2000 Elsevier Science L td. All rights reserved.