Design of a unified arithmetic processor based on redundant constant-factor CORDIC with merged scaling operation

An arithmetic processor is designed based on redundant constant-factor impl ementation of the coordinate rotation digital computer (CORDIC) algorithm w ith three different modes: circular, hyperbolic and linear. Both CORDIC typ es (angle calculation and vector rotation) are considered in this unified p rocessor that is capable of computing a wide variety of arithmetic and elem entary functions including: multiplication, division, some common trigonome tric functions, natural logarithms. square roots, vector norm and phase. Fu rthermore, by merging the scaling operation with the regular CORDIC iterati ons, the processor based on folded (iterative) CORDIC architecture reduces by about 1/4 the total number of iterations in one complete CORDIC operatio n.