VLSI design of an efficient embedded zerotree wavelet coder with function of digital watermarking

A VLSI architecture for the embedded zerotree wavelet (EZW) algorithm is pr esented that enables real-time scalable image coding. The breadth-first bot tom-up search method is adopted in scanning the wavelet coefficients in the ancestor-descendant tree hierarchy in order to easily locate the parent-ch ildren relationship and to increase the processing speed. The symbols gener ated in the significance mapping (SMAP) process and those in the successive approximation quantization (SAQ) process are encoded independently Compare d to previously proposed architectures, our design leads to fewer transmitt ed bits and thus alleviates the communication overhead without sacrificing peak-signal-noise-ratio (PSNR). in addition, a simple progressive digital w atermarking scheme is included in the EZW coder for purpose of copyright pr otection.