A CMOS self-calibrating frequency synthesizer

A programmable phase-locked-loop (PLL)-based frequency synthesizer, capable of automatically adjusting the nominal center frequency of the voltage-con trolled oscillator (VCO) to an optimum value is described, In fully integra ted PLLs, the VCO output frequency should be tunable over a wide range of f requencies, covering the desired range of the synthesizer output frequencie s, for all processing variations and operating conditions. A wide tuning ra nge realized by making the VCO gain K-o large has the unwanted effect of in creasing the phase noise at the output of the VCO, and hence the PLL as wel l, In this work, the wide tuning range is realized by digital control, with process variability managed through self-calibration. The PLL is only requ ired to pull the oscillator output frequency to account for the digital qua ntization, temperature variations, and some margin. This allows the K-o to be small, with better noise performance resulting. The prototype self-calib rating frequency synthesizer, capable of operating from 80 MHz to 1 GHz, de monstrates a measured absolute jitter of 20-ps rms at 480-MHz operating fre quency. The prototype IC is fabricated in a 0.35-mu m 3-V digital CMOS proc ess.