In this brief, a new Bicomplementary metal-oxide-semiconductor (CMOS) incre
ased full-swing inverter (IFSI) and a new BICMOS increased full-swing buffe
r (IFSB) for Iom voltage/low power ULSI (ultralarge scale integration) syst
ems are proposed. Based on the SPICE simulations, we demonstrate that these
circuits can operate at low internal voltage (V-int) and have low input si
gnal swing. With V-int > \V-t\ (assuming V-tn = -V-tp), the circuits work p
roperly. When the capacitor load is larger than 0.6pf, the propagation dela
ys and the delay power products of the proposed circuits for different inte
rnal voltages are better than those of previous circuits [3] under the same
circuit design parameters. Moreover, the proposed circuits achieve signifi
cant improvement in speed and noise margin. The results in this brief can a
void the trial and error step in the circuit sizing operation to reduce the
power consumpt.