Planar integration of heterojunction bipolar transistors and resonant tunneling diodes

A process is reported for monolithic integration of heterojunction bipolar transistors (HBTs) and resonant tunneling diodes (RTDs). The InGaAs/AlInAs HBT layers and the InGaAs/AlAs/InAs RTD layers are grown on an InP substrat e in one molecular beam epitaxy growth run. The devices are separated by an InP etch stop layer grown between the two materials. The devices are plana rized with polyimide and interconnected by second-level metal. Only minor m odifications to the existing HBT process were required to incorporate the R TDs. Laser reflectometry was used to accurately control the polyimide etch depth fur both etch steps. Process simulation was used prior to wafer fabri cation to predict the required etch depths and reduce process development t ime. A two-step polyimide etch back allows both devices to be contacted dir ectly by second-level metal. This allows both devices to be fabricated with the minimum design rule dimensions, thereby improving speed and reducing p ower consumption. An additional InP etch stop layer was included in one waf er between the emitter superlattice and the base spacer layer. The etch sto p layer improved beta uniformity but decreased the unity current gain cutof f frequency (F-t) by 11% and the maximum frequency of oscillation (F-max) b y 18%. (C) 2000 American Vacuum Society. [S0734-211X(00)05005-8].