Testing SRAM-based content addressable memories

This paper presents an extensive model and algorithms for detecting faults in SRAM-based dual-port and uni-port CAMs (Content Addressable Memories). T his model is based on analyzing the functionalities of a cell of an SRAM-ba sed CAM and dividing it into two parts (storage and comparison parts). It i s shown that faults can affect one or both parts. While storage faults can be detected using a traditional test algorithm (such as the March C), fault s affecting the comparison part of the cell require a substantially differe nt approach. A complete characterization of these faults is presented; by a nalyzing the structure of the cell in the dual and uni-port configurations, physical faults (such as stuck-at, stuck-open, stuck-on, bridge) in lines and transistors can be mapped to three functional fault sets by the executi on of the comparison operation. Two new detection algorithms (directly comp atible with the word-oriented March C algorithm, as widely used in existing commercial tools) are proposed; 100 percent coverage is achieved. The firs t algorithm (Concurrent Detection Algorithm or CDA) employs concurrent oper ations for testing a dual-port CAM; the second algorithm (Non Concurrent De tection Algorithm or NCDA) uses nonconcurrent operations and can be used fo r testing dual-port as well as uniport CAMs. CDA requires eight passes and (10N + 2L) tests, where N is the number of words of the CAM and L is the wi dth of a word. NCDA requires eight passes, too, but (12N + 2L) tests. The n umber of tests required by CDA land NCDA, too) is significantly less than r equired by existing algorithms.