FIT/PVL circuit-parameter extraction for general electromagnetic devices

Citation
I. Munteanu et al., FIT/PVL circuit-parameter extraction for general electromagnetic devices, IEEE MAGNET, 36(4), 2000, pp. 1421-1425
Citations number
12
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
IEEE TRANSACTIONS ON MAGNETICS
ISSN journal
00189464 → ACNP
Volume
36
Issue
4
Year of publication
2000
Part
1
Pages
1421 - 1425
Database
ISI
SICI code
0018-9464(200007)36:4<1421:FCEFGE>2.0.ZU;2-7
Abstract
The most efficient technique for solving held-circuit coupled problems is t o use an equivalent circuit for the electromagnetic device. This paper desc ribes a general technique for determining reduced order circuits starting f rom the held equations discretized with the Finite Integration Technique (F IT). Special boundary conditions ensure the good formulation of the coupled problem. Fade Via Lanczos (PVL) techniques are used for reducing the state -space form of the system. The proposed approach eliminates the need to act ually solve the field problem in order to extract the parameters of the equ ivalent circuit.