ELIMINATION OF STRESS-INDUCED DEFECTS IN POLYBUFFERED LOCOS ISOLATIONSCHEME FOR SUB-0.25-MU-M DESIGNS

Decreasing field oxide thickness or (and) increasing field oxidation t emperature up to 1100 degrees C, in a polybuffered local oxidation of silicon (PBL) isolation scheme, has a positive impact on field oxide t hinning in small spacings, stress-induced voiding in small active area s, as well as on 5 nm thin gate oxide Q(BD). A low field oxide thickne ss and a high temperature field oxidation enable the use of 0.7 mu m p itch PBL for sub-0.25 mu m complementary metal oxide semiconductor des igns. The transition of the bird's beak growth from a direct oxidation to a diffusion limited mechanism is consistent with the evolution of stress in the middle of active area as a function of field oxide thick ness or field oxidation temperature.