Direct tunneling gate leakage current in transistors with ultrathin silicon nitride gate dielectric

We present a study on the characterization and modeling of direct tunneling gate leakage current in both Nand P-type MOSFETs with ultrathin silicon ni tride (Si3N4) gate dielectric formed by the jet-vapor deposition (JVD) tech nique. The: tunneling mechanisms in the N- and PMOSFETs were clarified. The electron and hole tunneling masses and barrier potentials for the differen t tunneling mechanisms were extracted from measured data using a new semi-e mpirical model. This model was used to project the scaling limits of the JV D Si3N4 gate dielectric based on the supply voltages for the various techno logy nodes and the maximum tolerable direct tunneling gate current for high -performance and low-power applications.