Sensitivity of CMOS based imagers and scaling perspectives

CMOS based imagers are beginning to compete against CCDs in many areas of t he consumer market because of their system-on-a-chip capability, Sensitivit y, however, is a main weakness of CMOS imagers and enhancements and deviati ons from standard CMOS processes are necessary to keep up sensitivity with downscaled process generations. In the introductory section several definitions for the sensitivity of imag e sensors are reviewed with regard to their potential to allow meaningful c omparison of different detector structures. In the main section, the standa rd CMOS sensor architecture is compared to detector structures designed to improve the sensitivity, namely the photogate (PG), the pinned photodiode ( PPD) and the thin film on ASIC (TFA) approach. The latter uses a vertical i ntegration of the photodiode on top of the pixel transistors. A careful ana lysis of the relevant electrical, optical and technological parameters and many previously published experimental data for different imagers reveals t hat only the PPD and the TFA enhancements provide satisfactory sensitivity and withstand scaling down to 0.18 mu processes. Due to the higher fill fac tor and the higher quantum efficiency TFA provides significantly better val ues than PPD, The radiometric sensitivity of a 5 mum x 5 mum TFA pixel is f ound to amount to 11.9 V/(muJ/cm(2)) for a 0.25 mum process and 27.5 V/(muJ /cm(2)) for a 0.18 mum process.