Embedded HIMOS (R) flash memory in 0.35 mu m and 0.25 mu m CMOS technologies

In this paper, the performance and reliability characteristics of the 0.35 mum/0.25 mum High Injection MOS (HIMOS(R)) technology is described in detai l. This flash EEPROM technology relies on source-side injection for program ming acid Fowler-Nordheim tunneling for erasing, and has been successfully implemented in a 1 Mbit memory array embedded in a 0.35 mum CMOS technology , adding only about 30% to the processing cost of digital CMOS, Due to its triple gate structure, the HIMOS(R) cell exhibits a high degree of flexibil ity and scalability A fast programming operation (10 mus) at 3.3 V supply v oltage is combined with an endurance of well over 100 000 program/erase cyc les, immunity to all possible disturb effects and a retention time that lar gely exceeds 100 years at 125 degreesC, Furthermore, the cell has been scal ed to a 0.25 mum version, which is a laterally scaled version with the same operating voltages and tunnel oxide thickness. The use of secondary impact ionization is investigated as well and proves to be very promising for fut ure generations when the supply voltage is scaled below 2.5 V.