Chemical reaction concerns of gate metal with gate dielectric in Ta gate MOS devices: An effect of self-sealing barrier configuration interposed between Ta and SiO2

Citation
T. Ushiki et al., Chemical reaction concerns of gate metal with gate dielectric in Ta gate MOS devices: An effect of self-sealing barrier configuration interposed between Ta and SiO2, IEEE DEVICE, 47(11), 2000, pp. 2201-2207
Citations number
34
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON ELECTRON DEVICES
ISSN journal
00189383 → ACNP
Volume
47
Issue
11
Year of publication
2000
Pages
2201 - 2207
Database
ISI
SICI code
0018-9383(200011)47:11<2201:CRCOGM>2.0.ZU;2-H
Abstract
Chemical reaction of gate metal with gate dielectric for Ta gate MOS device s has been experimentally investigated both by electrical and physical meas urements: capacitance-voltage (C-V), current-voltage (I-V), transmission el ectron microscopy (TEM), energy dispersive X-ray (EDX), electron diffractio n measurements. In spite of the chemical reaction of Ta with SiO2 consuming similar to1-nm-thick in gate oxide, the interface trap densities of simila r to2 x 10(10) cm(-2)eV(-1) at midgap and ideal channel mobility characteri stics have been observed in the Ta gate MOS devices with 5.5-nm-thick therm al oxide gate dielectric, Considering the experimental data with theoretica l calculation based on thermodynamics together, a barrier laver model has b een developed for the Ta gate MOS systems. The physical mechanism involved is probably self-sealing barrier layer formation resulting from the chemica l reaction kinetics in the free-energy change of Ta-Si-O system.