Design of C-testable modified-booth multipliers

In this paper, we consider the design for testability of a multiplier based on the modified Booth Algorithm. First, rye present a basic array implemen tation of the multiplier. Next. we introduce testability considerations to derive two C-testable designs. The first of the designs is C-testable under the single stuck-at fault model (SAF) with 10 test patterns. And, the seco nd is C-testable under the cell fault model (CFM) with 33 test patterns.