Optimum design in a JFET for minimum generation-recombination noise

Generation-recombination noise caused by the presence of deep level traps i n the depletion regions of a junction field effect transistor (JFET) is ana lyzed. An analytical expression which includes all the elements that influe nce the process was used. A numerical procedure allowed us to calculate wit h high precision the magnitudes necessary to evaluate the noise spectral de nsity. The doping profile and gate bias voltage were selected among all the factors involved to analyze their effects on the noise. Important differen ces were appreciated when uniform and ion-implanted profiles were used for JFET design. Finally, it is shown that the behavior of the noise spectral d ensity as a function of the gate voltage depends on the characteristics of the device. (C) 2000 Elsevier Science Ltd. All rights reserved.