MATERIALS BASIS FOR A 6-LEVEL EPITAXIAL HTS DIGITAL CIRCUIT PROCESS

Citation
J. Talvacchio et al., MATERIALS BASIS FOR A 6-LEVEL EPITAXIAL HTS DIGITAL CIRCUIT PROCESS, IEEE transactions on applied superconductivity, 7(2), 1997, pp. 2051-2056
Citations number
12
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
10518223
Volume
7
Issue
2
Year of publication
1997
Part
2
Pages
2051 - 2056
Database
ISI
SICI code
1051-8223(1997)7:2<2051:MBFA6E>2.0.ZU;2-L
Abstract
We have developed a process for fabrication of HTS single-flux-quantum logic circuits based on edge SNS junctions which requires six epitaxi al film layers and six mask levels, The process was successfully appli ed to fabrication of small-scale circuits (less than or equal to 10 ju nctions), This paper examines the materials properties affecting the r eproducibility of YBCO-based SNS junctions, the low inductance provide d by an integrated YBCO ground plane, and electrical isolation by SrTi O3 or Sr2AlTaO6 ground-plane and junction insulator layers, Some of th e critical processing parameters identified by electrical measurements , TEM, SEM, and AFM were control of second-phase precipitates in YBCO, oxygen diffusion, Ar ion-milling parameters, and preparation of surfa ces for subsequent high-temperature depositions.