CHARACTERIZATION AND IMPROVEMENT OF A YBCO MULTILAYER FILM PROCESS FOR HTS CIRCUIT APPLICATIONS

We have developed a 2'' multilayer HTS integrated circuit process whic h contains up to three superconducting YBCO layers, epitaxial dielectr ic (SrTiO3 or SrTiO3 + Sr2AlTaO6 combination), Ag wiring, an integrate d resistor and non-epitaxial SixNy dielectric. We have incorporated th e use of n-factorial and Taguchi designed experiments to develop and o ptimize various aspects of this process, This article highlights the d esigned experiments which addressed fabrication issues for HTS superco nducting crossovers, dielectric integrity, and HTS/Ag metal contact re sistance.