A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme

Authors
Atsumi, S Umezawa, A Tanzawa, T Taura, T Shiga, H Takano, Y Miyaba, T Matsui, M Watanabe, H Isobe, K Kitamura, S Yamada, S Saito, M Mori, S Watanabe, T
Citation
S. Atsumi et al., A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme, IEEE J SOLI, 35(11), 2000, pp. 1648-1654
Citations number
15
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
ISSN journal
00189200 → ACNP
Volume
35
Issue
11
Year of publication
2000
Pages
1648 - 1654
Database
ISI
SICI code
0018-9200(200011)35:11<1648:AC13NF>2.0.ZU;2-H
Abstract
A 1.8-V-only 32-Mb NOR flash EEPROM has been developed based on the 0.25-mu m triple-well double-metal CMOS process. A channel-erasing scheme has been implemented to realize a cell size of 0.49 mum(2), the smallest yet reporte d for 0.25-mum CMOS technology. A block decoder circuit with a novel erase- reset sequence has been designed for the channel-erasing operation. A bitli ne direct sensing scheme and a wordline boosted voltage pooling method have been developed to obtain high-speed reading operation at low voltage. Acce ss time of 90 ns at 1.8 V has been realized.