Power aware page allocation

One of the major challenges of post-PC computing is the need to reduce ener gy consumption, thereby extending the lifetime of the batteries that power these mobile devices. Memory is a particularly important target for efforts to improve energy efficiency. Memory technology is becoming available that offers power management features such as the ability to put individual chi ps in any one of several different power modes. In this paper we explore th e interaction of page placement with static and dynamic hardware policies t o exploit these emerging hardware features. In particular, we consider page allocation policies that can be employed by an informed operating system t o complement the hardware power management strategies. We perform experimen tal using two complementary simulation environments: a trace-driven simulat or with workload traces that are representative of mobile computing and an execution-driven simulator with a detailed processor/memory model and a mor e memory-intensive set of benchmarks (SPEC2000). Our results make a compell ing case for a cooperative hardware/software approach for exploiting power- aware memory, with down to as little as 45% of the Energy.Delay for the bes t static policy and 1% to 20% of the Energy.Delay for a traditional full-po wer memory.