REALIZATION OF A 2ND LEVEL NEURAL-NETWORK TRIGGER FOR THE H1 EXPERIMENT AT HERA

Since 1996 the H1 experiment is fully equipped with two independent fa st pattern recognition systems operating as second level triggers (L2) . The decision time is 20 mu s. One of the two is the neural network t rigger. It runs an array of presently ten VME-boards with CNAPS 1064 c hips (20 MHz, 128 Mcps) by Adaptive Solutions. The input trigger data from the detector components arrive in various formats on a 8 x 16 bit wide 10 MHz bus. Before usable as 8-bit input values to the CNAPS the y are preprocessed by several bit-manipulating algorithms and arithmet ic functions implemented on XILINX 4008 field programmable gate arrays (FPGA). The startup strategy for the new system is to concentrate on photoproduction channels or low multiplicity final states which so far could only be efficiently triggered with unacceptable high rates.