ROBUST SUPERCONDUCTING DIE ATTACH PROCESS

As complexity of superconducting digital systems increase, the need fo r multi-chip modules and a reliable, high bandwidth attachment scheme for superconducting die becomes more and more critical. We have develo ped a flip chip die attach process for Low Temperature Superconducting (LTS) chips using InSn reflow soldering. Using standard reflow techni ques, we create highly reproducible, uniform 14 micron-high solder bum ps on gold-defined pad regions. Subsequent alignment, compression, and reflow soldering produce reliable, low inductance connections with hi gh yield. The short interconnect distance of 5-7 mu m results in low e nough inductance to support multi-GHz chip interconnect at low impedan ce. We have successfully tested and thermally cycled flip chipped die over many temperature cycles to liquid helium temperatures with no fai lures. We will report on successful attachment, testing, and rework of superconducting circuit chips. Specifically, we present data on solde r bump uniformity, yield, electrical and thermal characteristics, rewo rkability, and reliability under repeated thermal cycling.(i)