INTERFACE CIRCUITS FOR CHIP-TO-CHIP DATA TRANSFER AT GHZ RATES

Interface circuits for the transfer of data between Single Flux Quantu m (SFQ) circuits have been designed, fabricated, and operated at speed s up to 3 Gigabits per second. The circuit employed an improved versio n of the SFQ/Latch converter, a Modified Variable Threshold Logic (MVT L) OR/AND gate, a 3X latching amplifier, and a 3X-to-10X latching ampl ifier, The amplifier circuits employed stacks of latching junctions, R esistors between the parallel stacks of junctions damped residual curr ents to prevent flux trapping during reset, Tolerance to critical curr ent variations in the series stacks of junctions was provided by induc tive chokes on the input junction shunting resistors, Microwave modeli ng programs were used to ensure proper distribution of the applied cur rent to all of the latching elements, The circuit transferred data at 3 Gigabits per second from one SFQ circuit up to room temperature and back to another SFQ circuit through 3.4 meters of 50-ohm cable.