A new SFQ data communication switch has been designed and tested. Comp
lete operation of a 4 x 4 switch circuit has been demonstrated with ad
dress decoding at low-speed, Transmission through a given path in the
switch has been demonstrated for data rates up to 4 Gb/s, Circuit simu
lations show operation of the switch cells up to 30 Gb/s, The circuit
was fabricated using HYPRES's standard 1 kA/cm(2) niobium process, The
switch has a crossbar architecture with an rf SQUID based switch cell
at each crosspoint. The address is decoded by means of RSFQ shift reg
isters which are integrated into the switch matrix, The design enables
high bit-rate, low cross-talk, non-blocking architecture, NRZ or RZ d
ata format, and self routing of variable length data packets.