REAL-TIME DIGITAL ERROR-CORRECTION FOR FLASH ANALOG-TO-DIGITAL CONVERTER

We have designed, fabricated and successfully tested digital error-cor rection circuits to improve the performance of superconductive flash a nalog-to-digital converters (ADCs). The comparators coding the most si gnificant bias (MSBs) are the least sensitive to the input signal, and therefore have the most threshold errors due to jitter and threshold misplacement. These errors are completely eliminated by implementing a n ADC architecture using two comparators per bit, sand employing logic to encode bit N by looking back to the state of the (N-1) bit. In thi s way, all code transitions are derived from the least significant bit (LSB) comparators. The MSB comparators are used only to encode the LS E data.