A NOVEL JOSEPHSON TERNARY MULTIPLIER

A novel Josephson ternary logic circuit to perform multiplication is p roposed. The fundamental circuit of the multiplier is based on Josephs on complementary ternary logic circuit (JCTL). In this paper the princ iple of the ternary multiplier is described. We have fabricated the mu ltiplier using SQUIDs which were made of Nb/AlOx/Al/Nb junctions, and measurements of the logic operation of the circuit were carried out. T he results showed satisfactory operation of the multiplier, which agre ed well with the results of simulation. The advantages of the proposed ternary multiplier are capability of ultrahigh speed computation, low power consumption and very simple construction with less number of el ements to perform a ternary multiplication.