A study on design of a flip-flop with asymmetrical noise immunity

Flip-flops were originally designed to be symmetrical for set/reset operati on. This paper proposes an asymmetrical noise immunity flip-flop that has a different noise voltage for Q: H-->L than for Q: L-->H when the flip-flop malfunctions due to noise on the de power supply. It is shown that an asymm etrical noise immunity flip-flop can be created by giving different overdri ve factors (ODFs) to each of the two transistors in the flip-flop, where OD F is lb/lb(min) (lb: base current of initially saturated transistor, lb(min ): minimum base current required to maintain saturation). (C) 2000 Scripta Technica.