Fast VLSI motion estimator based on bit plane matching

Authors
Ko, YK Kim, HG Oh, HC Ko, SJ
Citation
Yk. Ko et al., Fast VLSI motion estimator based on bit plane matching, ELECTR LETT, 36(23), 2000, pp. 1923-1924
Citations number
4
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
36
Issue
23
Year of publication
2000
Pages
1923 - 1924
Database
ISI
SICI code
0013-5194(20001109)36:23<1923:FVMEBO>2.0.ZU;2-4
Abstract
A fast VLSI motion estimator based on bit plane matching is proposed. The m otion estimator employs a pair of processing cores that calculate the motio n vector concurrently. By controlling the data flow in a systolic fashion u sing internal shift registers of the processing cores, the local memory (SR AM) is discarded to reduce the time overhead for accessing the local memory and utilise lower-cost fabrication technology.