Attentional mechanisms are required to overcome the problem of flooding a l
imited processing capacity system with information. They are present in bio
logical sensory systems and can be a useful engineering tool for artificial
visual systems. In this article we present a hardware model of a selective
attention mechanism implemented on a very large-scale integration (VLSI) c
hip, using analog neuromorphic circuits. The chip exploits a spike-based re
presentation to receive, process, and transmit signals. It can be used as a
transceiver module for building multichip neuromorphic vision systems. We
describe the circuits that carry out the main processing stages of the sele
ctive attention mechanism and provide experimental data for each circuit. W
e demonstrate the expected behavior of the model at the system level by sti
mulating the chip with both artificially generated control signals and sign
als obtained from a saliency may, computed from an image containing several
salient features.