Scalable Multi-QoS IP plus ATM switch router architecture

Citation
K. Shiomoto et al., Scalable Multi-QoS IP plus ATM switch router architecture, IEEE COMM M, 38(12), 2000, pp. 86-92
Citations number
8
Categorie Soggetti
Information Tecnology & Communication Systems
Journal title
IEEE COMMUNICATIONS MAGAZINE
ISSN journal
01636804 → ACNP
Volume
38
Issue
12
Year of publication
2000
Pages
86 - 92
Database
ISI
SICI code
0163-6804(200012)38:12<86:SMIPAS>2.0.ZU;2-4
Abstract
This article proposes a scalable multi-QoS IPS-ATM switch router architectu re. The proposed switch router is based on a core ATM switching system with multi-QoS capability. Forwarding engines and a routing engine are attached in front of the line cards of the ATM switching system. The FEs and RE are interconnected with each other via internal VCs. A novel longest matching algorithm is employed at the FE to achieve packet forwarding at wire-speed of OC-12c rate (622.08 Mb/s). Wire-speed unicast and multicast packet forwa rding are performed using point-to-point and point-to-multipoint VCs in a u nified way. Because FEs and RE are decoupled from the base ATM switching sy stem, the full spectrum of ATM QoS capability is nicely applied for IP QoS control with a packet classification at the edge of the network. The core s witching fabric is scalable from 40 to 160 Gb/s capacity (371 MPPS in terms of packet forwarding throughput). Feedback rate control is employed at eac h line card to eliminate congestion in the high-speed core switching fabric even with a small amount of buffer.