Power Si-MOSFET operating with high efficiency under low supply voltage

A design method for RF power Si-MOSFETs suitable for low-voltage operation with high power-added efficiency is presented, In our experiments, supply v oltages from 1 V to 3 V are examined. As the supply voltage is decreased, d egradation of transconductance also takes place. However, this problem is o vercome, even at extremely low supply voltages, by adopting a short gate le ngth and also increasing the N- extension impurity concentration-which dete rmines the source-drain breakdown voltage (V-dss)-and thinning the gate oxi de-which determines the TDDB between gate and drain, Additionally, in order to reduce gate resistance, the Co-salicide process is adopted instead of m etal gates. With salicide gates, a 0.2 mum gate length is easily achieved b y poly Si RIE etching, while if metal gates mere chosen, the metal film its elf mould have to be etched by RIE and it would be difficult to achieve suc h a small gate length. Although the resistance of a Co-salicided gate is hi gher than that of metal gate, there is no evidence of a difference in power -added efficiency when the finger length is below 100 mum It is demonstrate d that 0.2 mum gate length Co-salicided Si MOSFETs can achieve a high power -added efficiency of more than 50% in 2 GHz RF operation with an adequate b reakdown voltage (V-dss) In particular, an efficiency of more than 50% was confirmed at the very low supply voltage of 1.0 V, as well as at higher sup ply voltages such as 2 V and 3 V. Small gate length Co-salicided Si-MOSFETs are a good candidate for low-voltage, high efficiency RF power circuits op erating in the 2 GHz range.