Peripheral current analysis of silicon p-n junction and gated diodes

The peripheral reverse current I-p in silicon p-n junctions sets the leakag e and standby power limits in modern integrated circuits. In order to study its origin more in depth, a detailed analysis of the reverse current throu gh a gated diode is developed here. In particular, it is shown that the stu dy of the reverse current component associated with the thick field oxide u nder depletion and inversion provides a sensitive tool. In addition, combin ing the gate bias dependence with the temperature variation of the reverse gated diode current allows us to identify its different components, namely, the diffusion J(pDIF), the depletion region generation J(pGENblk), and the surface generation current density J(pGENsrf). Based on this analysis, it is demonstrated that the peripheral diffusion current shows a remarkable in crease with gate bias VG, while for standard diodes an increase with the re verse voltage VR is revealed. This bias dependence has to be taken into acc ount when studying the activation energy of the diffusion and generation pa rts of the peripheral current. It is finally demonstrated that the proposed gated-diode analysis of the peripheral diode current is markedly more sens itive than analysis of the standard p-n junctions with a large perimeter. ( C) 2000 American Institute of Physics. [S0021-8979(00)07824-5].