Jet vapor deposition nitride processing and application to advanced CMOS devices for reduction of gate leakage current and boron penetration

Authors
Tseng, HH Veteran, J Tobin, PJ Mogab, J Tsui, PGY Wang, V Khare, M Wang, XW Ma, TP Hobbs, C Hegde, R Hartig, M Kenig, G Blumenthal, R Cotton, R Kaushik, V Tamagawa, T Halpern, BL Cui, GJ Schmitt, JJ
Citation
Hh. Tseng et al., Jet vapor deposition nitride processing and application to advanced CMOS devices for reduction of gate leakage current and boron penetration, MAT SC S PR, 3(3), 2000, pp. 173-178
Citations number
5
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science","Material Science & Engineering
Journal title
MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING
ISSN journal
13698001 → ACNP
Volume
3
Issue
3
Year of publication
2000
Pages
173 - 178
Database
ISI
SICI code
1369-8001(200006)3:3<173:JVDNPA>2.0.ZU;2-R
Abstract
The increase in gate leakage current and boron penetration are major proble ms for scaled gate dielectrics in advanced device technology. We have demon strated, for the first time, reduction in gale leakage current and strong r esistance to boron penetration when jet vapor deposition (JVD) nitride is u sed as a gate dielectric in an advanced CMOS process. JVD nitride provides a robust interface in addition to well behaved bulk properties, MOSFET char acteristics and ring oscillator performance. Process optimization is discus sed. Manufacturing issues remain to be addressed. (C) 2000 Elsevier Science Ltd. All rights reserved.