The design, construction and performance of the H1 silicon vertex detector
is described. It consists of two cylindrical layers of double-sided, double
-metal silicon sensors read out by a custom designed analog pipeline chip.
The analog signals are transmitted by optical fibres to a custom-designed A
DC board and are reduced on PowerPC processors. Details of the design and c
onstruction are given and performance figures from the first data-taking pe
riods are presented. (C) 2000 Elsevier Science B.V. All rights reserved.