Design and analysis of radix-8/4/2 64b/32b integer divider using COMPASS cell library

A high speed 64b/32b integer divider employing digit-recurrence division me thod and the on-the-fly conversion algorithm, wherein a fast normalizer is included, which is used as the pre-processor of the proposed integer divide r. For the sake of enhancing throughput rate, the proposed divider uses a m ixed radix-8/4/2 division instead of the traditional radix-2 division. On-t he-fly remainder adjustment is also realized in the converter module of the divider. The entire design is written in Verilog HDL (hardware description language) employing COMPASS 0.6 mum 1P3M cell library (V3.0), and then syn thesized by SYNOPSYS. The simulation results indicate that our design is a better option than the existing long divider designs.