Microwave noise modeling of InP based MODFETs biased for low power consumption

This paper presents the fabrication, experimental characterization and mode ling of 0.15 mum gate-length lattice matched MODFETs based on InP technolog y. The variation of the drain noise temperature of the Pospieszalski model (T-D) with the applied bias has been investigated under very low power cons umption conditions, and a noticeably complex dependence of this factor on t he drain current has been observed, In fact, T-D can decrease with increasi ng drain currents, and suffers a strong increase as a function of the drain voltage even at very low values of the drain current. However, all of thes e effects can be qualitatively explained from physical considerations.