Semiconductor growth and junction formation within nano-porous oxides

We have developed semiconductor growth techniques for the coating and filli ng of nanopores in ceramic-type substrates. The main idea behind this resea rch is to use the large inner surface of ceramics as a template for the rsa lization of semiconductor heterojunctions with extremely large interface ar ea. As porous substrates we use lightly sintered nanocrystalline TiO2 of 5- 10 mum thickness. The pore volume in these substrates is similar to 50% and the average pore diameter is 30-50 nm. We are able to establish nanometer thick coatings on the inner surfaces of these substrates or - in a differen t technique - fill the pore volume with (100 +/- 3)% efficiency. The growth techniques involve chemical and electrochemical methods from liquid soluti ons. Binary, ternary and, most recently, quarternary rnompounds of the II-V I and I-III-VI material systems were prepared.