Design of a fixed-point digital filter for state estimation for UPS applications

This paper describes the design of a fixed-point digital filter for the hig h-speed measurement and estimation of low-frequency ac signals encountered in uninterruptible power supplies (UPSs) for implementation in a low-cost d igital system. The proposed design procedure addresses, in a unified manner , the issues of minimization of the effects due to noise in measurement, co mputational round-off errors, quantization due to analogue-to-digital conve rsion and filter-coefficient representation along with filter performance r equirements such as speed of response and scaling to avoid internal overflo w errors.