Barrier synchronization is a useful parallel programming construct for ensu
ring that all processors are at a particular location in the code before an
y processor is allowed to continue. Barrier synchronization is integral to
programming models such as the Bulk Synchronous Parallel model. Specialized
hardware is often used to improve the performance of a barrier synchroniza
tion operation. With continued improvement in processor performance, more e
fficient synchronization mechanisms are required to counter the rising rela
tive cost of synchronization operations. A high-speed, distributed barrier
synchronization mechanism has been developed for broadcast-based optical in
terconnection networks. This mechanism avoids multiple conversions between
optical and electrical signals by having each processor locally decide whet
her the barrier in which it is participating has been satisfied. It also al
lows arbitrary sized partitions to be built dynamically during the executio
n of a program. Simulations of the current hardware design estimate that th
e barrier synchronization requires less than 300ns for a 128-processor syst
em.