Discharge mechanisms modeling in LPCVD silicon nanocrystals using C-V and capacitance transient techniques

Citation
C. Busseret et al., Discharge mechanisms modeling in LPCVD silicon nanocrystals using C-V and capacitance transient techniques, SUPERLATT M, 28(5-6), 2000, pp. 493-500
Citations number
16
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
SUPERLATTICES AND MICROSTRUCTURES
ISSN journal
07496036 → ACNP
Volume
28
Issue
5-6
Year of publication
2000
Pages
493 - 500
Database
ISI
SICI code
0749-6036(200011/12)28:5-6<493:DMMILS>2.0.ZU;2-D
Abstract
Charging and discharging phenomena from silicon nanocrystals have been stud ied by means of capacitance-voltage characteristics on P-type metal-oxide-s emiconductor (P-MOS) capacitors with embedded self-assembled silicon quantu m dots. The dots have a floating gate behavior as shown by the hysteresis o n C-V curves. The Si-dots are charged or discharged by direct tunneling of carriers through a 3 nm thick oxide. The nanocrystals could be charged by e lectrons or holes, depending on the charging bias conditions. The discharge is studied by constant bias method and shows a logarithmic variation with time. Retention times higher than several hours are observed. A simple mode l is developed in order to evaluate the electric field within the tunneling oxide layer. Then, complete simulations are done for the different dischar ge paths. The barrier heights are extracted from the discharge data and pos sible confinement effects are discussed. The results confirm the high poten tiality of silicon nanocrystal-floating gates for memory applications. (C) 2000 Academic Press.