Tm. Roh et al., High-voltage SOI power IC technology with non-RESURF n-LDMOSFET and RESURFp-LDMOSFET for PDP scan-driver applications, J KOR PHYS, 37(6), 2000, pp. 889-892
A new power IC technology integrating non-Reduced-SURface Field (non-RESURF
) n-channel lateral double-diffused MOSFET (n-LDMOSFET) and RESURF p-LDMOSF
ET into a 1.2 mum CMOS on a single chip was developed to apply to PDP scan-
driver ICs. The developed power IC technique can reduce production cost and
increase the process margin compared with conventional technique. The brea
kdown voltages of n- and p-LDMOSFETs were larger than 250 V, and their spec
ific on-resistances were 50 m Omega . cm(2) and 140 m Omega . cm(2) respect
ively The PDP scan-driver IC fabricated by the proposed power IC technology
showed good operation up to 250 V. The rising and the falling times of the
PDP scan-driver IC were less than 110 nsec under Vdd=200 V and C-L=100 pF.