This article demonstrates the integration of imprint lithography into nanoe
lectronic device fabrication. We present a quantum point contact (QPC) with
split gates patterned by imprint lithography. The semiconductor substrate
is a modulation-doped GaAs/AlGaAs heterostructure with the two-dimensional
electron gas located about 90 nm below the surface. A Si mold with a split-
gate pattern is embossed into a poly(methylmethacrylate) film located on to
p of the semiconductor. The Schottky gates are fabricated by metal evaporat
ion and liftoff. The gate tip separation ranges from 120 to 600 nm. Transpo
rt studies performed at T=2 K show conductance quantization with varying ga
te voltages. Measurements performed on a reference QPC with gates defined b
y electron beam lithography show similar results. This indicates that the i
mprint does not affect the electronic performance of the semiconductor. (C)
2000 American Vacuum Society. [S0734-211X(00)05306-3].