High performance real-time neural scheduler for ATM switches

Citation
Jm. Pousada-carballo et al., High performance real-time neural scheduler for ATM switches, IEEE COMM L, 4(11), 2000, pp. 372-374
Citations number
12
Categorie Soggetti
Information Tecnology & Communication Systems
Journal title
IEEE COMMUNICATIONS LETTERS
ISSN journal
10897798 → ACNP
Volume
4
Issue
11
Year of publication
2000
Pages
372 - 374
Database
ISI
SICI code
1089-7798(200011)4:11<372:HPRNSF>2.0.ZU;2-P
Abstract
Input-buffered asynchronous transfer mode (ATM) packet switches are simpler than output-buffered switches. However, due to HOL blocking, their through put is poor. Neural schedulers represent a promising solution for high thro ughput input-buffered switching, but their response time variance is too hi gh for realistic hard real-time constraints. To overcome this problem, in t his paper we formulate and evaluate a new neural scheduler with bounded res ponse time.