A comparison of quantum-mechanical capacitance-voltage simulators

We have systematically compared the results of an extensive ensemble of the most advanced available quantum-mechanical capacitance-voltage (C-V) simul ation and analysis packages for a range of metal-oxide-semiconductor device parameters. While all have similar trends accounting for polysilicon deple tion and quantum-mechanical confinement, quantitatively, there is a differe nce of up to 20 % in the calculated accumulation capacitance for devices wi th ultrathin gate dielectrics. This discrepancy leads to large inaccuracies in the values of dielectric thickness extracted from capacitance measureme nts and illustrates the importance of consistency during C-V analysis and t he need to fully report how such analysis is done.