A CMOS HDSL2 analog front-end

Citation
A. Gattani et al., A CMOS HDSL2 analog front-end, IEEE J SOLI, 35(12), 2000, pp. 1964-1975
Citations number
41
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
ISSN journal
00189200 → ACNP
Volume
35
Issue
12
Year of publication
2000
Pages
1964 - 1975
Database
ISI
SICI code
0018-9200(200012)35:12<1964:ACHAF>2.0.ZU;2-V
Abstract
A 5-V 0.5-mum CMOS analog front-end (AFE) IC for HDSL2 incorporates transmi t digital-to-analog converter (DAC), transmit filters, output buffer, recei ve AGC, and receive ADC, The AFE consumes 525 mW and provides better than 8 2-dB signal-to-noise-and distortion ratio (SNDR) in both transmit and recei ve paths. It supports variable data rates from 64 kb/s up to 2.32 Mb/s, and enables an HDSL2 system to achieve better than 14 kft of noise-free reach ton 26-gauge mire) at 1.544 Mb/s.